Fujitsu Microelectronics Asia Pte Ltd (FMAL) has announced the development of a digital HDTV system-on-chip (SoC) that integrates a video processing engine for superior picture quality, and a full high-definition (full HD, 1920 dots x 1080 lines) multi-decoder that decodes both MPEG-2(*1) and H.264(*2) video compression formats. The new chip, the MB86H70, is aimed for digital TVs receiving high-definition broadcasts that are ramping up in Europe.
MB86H70 is an application specific standard product (ASSP) (*3), that features a proprietary video processing engine based on an algorithm by Fujitsu Laboratories Limited. By also including a proprietary picture quality adjustment tool that enables easy optimization of parameters by using a mouse, the new LSI enables TV set makers to dramatically improve their design efficiencies with regard to picture quality settings. Furthermore, SoC integration of the video processing engine and multi-decoder allows the usage of common memory, thus enabling use of the chip by simply adding two 16-bit external memories, thereby reducing TV set makers’ costs and development periods for both design and manufacturing. Sample shipment of this new SoC will start from mid-October 2008.
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