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hi there i would be very much happy if someone could please give me a review on basic differences between PCI-X slot, PCIe slot, PCI slot and AGP slot: Differences as well as what they have in common and which motherboard series they belong to if possible?
PCI-X also known to be PCI extended is a computer bus and expansion card standard that enhanced the PCI Local Bus for higher bandwidth demanded by servers. It is a double-wide version of PCI, running at up to four times the clock speed, but is otherwise similar in electrical implementation and uses the same protocol. It has itself been replaced in modern designs by the similar-sounding PCI Express, which features a very different logical design, most notably being a narrow but fast serial connection instead of a wide but slow parallel connection.
PCI Express more to explained as Peripheral Component Interconnect Express, officially abbreviated as PCIe, is a computer expansion card standard designed to replace the older PCI, PCI-X, and AGP standards. Introduced by Intel in 2004, PCIe or PCI-E, as it is commonly called is the latest standard for expansion cards that is available on mainstream personal computers.
PCI Express is used in consumer, server, and industrial applications, both as a motherboard-level interconnect to link motherboard and mounted peripherals and as an expansion card interface for add-in boards. A key difference between PCIe and earlier PC buses is a topology based on point-to-point serial links, rather than a shared parallel bus architecture.
The PCIe electrical interface is also used in a variety of other standards, most notably the ExpressCard laptop expansion card interface.
The PCI Local Bus usually known to be PCI, or Conventional PCI, is a computer bus for attaching hardware devices in a computer. These devices can take either the form of an integrated circuit fitted onto the motherboard itself, called a planar device in the PCI specification or an expansion card that fits into a socket. The name PCI is formed from Peripheral Component Interconnect. The PCI bus is common in modern PCs, where it has displaced ISA and VESA Local Bus as the standard expansion bus, and it also appears in many other computer types. Despite the availability of faster interfaces such as PCI-X and PCI Express, conventional PCI remains a very common interface.
The PCI specification covers the physical size of the bus including wire spacing, electrical characteristics, bus timing, and protocols. The specification can be purchased from the PCI Special Interest Group.
PCI video cards remain available for supporting extra monitors and upgrading PCs that do not have any AGP or PCI express slots.
Many devices traditionally provided on expansion cards are now commonly integrated onto the motherboard itself, meaning that modern PCs often have no cards fitted. However, PCI is still used for certain specialized cards, although many tasks traditionally performed by expansion cards may now be performed equally well by USB devices.
The Accelerated Graphics Port also called as Advanced Graphics Port, often shortened to AGP is a high speed point to point channel for attaching a graphics card to a computer's motherboard, primarily to assist in the acceleration of 3D computer graphics. Since 2004, AGP is being progressively phased out in favor of PCI Express. However, as of mid 2008 new AGP cards and motherboards are still available for purchase, though OEM driver support is minimal.
PCI:
PCI provides two separate 32-bit or 64-bit address spaces corresponding to the memory and I/O port address spaces of the x86 processor family. Addresses in these address spaces are assigned by software. A third address space, called the PCI Configuration Space, which uses a fixed addressing scheme, allows software to determine the amount of memory and I/O address space needed by each device. Each device can request up to six areas of memory space or I/O port space via its configuration space registers.
The operating system queries all PCI buses at startup time to find out what devices are present and what system resources each needs. It then allocates the resources and tells each device what its allocation is.
The PCI configuration space also contains a small amount of device type information, which helps an operating system choose device drivers for it, or at least to have a dialogue with a user about the system configuration.
PCI Latency Timers are a mechanism for PCI Bus-Mastering devices to share the PCI bus fairly. Fair in this case means that devices won't use such a large portion of the available PCI bus bandwidth that other devices aren't able to get needed work done.
PCI device that can operate in bus-master mode is required to implement a timer, called the Latency Timer, that limits the time that device can hold the PCI bus. The timer starts when the device gains bus ownership, and counts down at the rate of the PCI clock. When the counter reaches zero, the device is required to release the bus. If no other devices are waiting for bus ownership, it may simply grab the bus again and transfer more data.
Peripheral Component Interconnect Express:
PCIe bus can be thought of as a high-speed serial replacement of the older PCI/PCI-X bus. At the software-level, PCIe preserves compatibility with PCI; a PCIe device can be configured and used in legacy application and operating-systems which have no direct knowledge of PCIe's newer features. PCIe communication is encapsulated in packets. The work of packetizing and depacketizing data and status-message traffic is handled by the transaction-layer of the PCIe port. Radical differences in electrical-signalling and bus-protocol require the use of a different mechanical form factor and expansion connectors.
PCIe devices communicate via a logical connection called a link. A link is a point-to-point communication channel between 2 PCIe ports, allowing both to send/receive ordinary PCI-requests and sideband messages. At the physical level, a link is composed of 1 or more lanes; low-speed peripherals use only a single-lane link, while a graphics-adapter typically uses a much-wider 16-lane link.
A PCIe card will fit into a slot of its physical size or bigger, but may not fit into a smaller PCIe slot. Some slots use open-ended sockets to permit physically longer cards and will negotiate the best available electrical connection. The number of lanes actually connected to a slot may also be less than the number supported by the physical slot size.
AGP information:
As computers became increasingly graphically oriented, successive generations of graphics adapters began to push the limits of PCI, a bus with shared bandwidth. This led to the development of AGP, a bus dedicated to graphics adapters.
For the needs of modern graphics adapters, AGP is superior to PCI because it provides a dedicated pathway between the slot and the processor rather than sharing the PCI bus, allowing for faster communication. AGP also uses sideband addressing, meaning that the address and data buses are separated so the entire packet does not need to be read to get addressing information. This is done by adding eight extra 8-bit buses which allow the graphics controller to issue new AGP requests and commands at the same time with other AGP data flowing via the main 32 address/data lines. This results in improved overall AGP data throughput.
In addition, to load a texture, a PCI graphics card must copy it from the system's RAM into the card's framebuffer, whereas an AGP card is capable of reading textures directly from system RAM using the Graphics Address Remapping Table. GART reapportions main memory as needed for texture storage, allowing the graphics card to access them directly.The maximum amount of system memory available to AGP is defined as the AGP aperture.
The two main reasons graphics cards with the PCI interface are still produced are that, first, they can be used in nearly any PC; because while some motherboards with built-in graphics adapters lack an AGP slot, few, if any, modern desktop PCs lack PCI slots. Secondly, a user with an appropriate operating system can use several PCI graphics cards simultaneously — to give many different video outputs. This is almost impossible with AGP 1.0 and AGP 2.0 cards, because they do not support more than one AGP Master per AGP Target. AGP 3.0 does support more than one AGP Master per AGP Target, but nonetheless few PC motherboards are equipped with more than one AGP slot. AlphaServer ES80 up to 4 AGP slots, and the AlphaServer ES47 up to 2 AGP slots.
PCI-X was developed jointly by IBM, HP, and Compaq and submitted for approval in 1998. It was an effort to verify proprietary server extensions to the PCI local bus to increase performance of high bandwidth devices such as Gigabit Ethernet, Fibre Channel and Ultra3 SCSI cards and allow processors to be interconnected in clusters.
PCI-X needed some devices, most notably Gigabit Ethernet cards, Fibre Channel and Ultra320 SCSI controllers, and cluster interconnects could, by themselves, saturate the full bandwidth of the PCI bus. The first solution was to run the 33-MHz PCI bus at double the speed, 66 MHz, effectively doubling the throughput to 266 MB/s. However, machines with multiple high-bandwidth devices still needed more headroom, so additional pins were added to the slot, going from 120 to 184, to form a 64-bit variety. This initially only ran at 33 MHz, basically giving the same maximum throughput of 266 MB/s. Though combined 64-bit, 66-MHz ports had also been implemented, these extensions had been only loosely supported as optional parts of the PCI 2.x standards. Device compatibility beyond the basic 133 MB/s continued to be difficult.
Developers eventually used the combined 64-bit and 66-MHz extension as a foundation, and anticipating future demand, established 66-MHz and 133-MHz variants to raise the maximum bandwidths to 527 MB/s and 1064 MB/s, respectively. The joint result was submitted as PCI-X to the PCI Special Interest Group. Subsequent approval made it an open standard adoptable by all computer developers. The PCI SIG controls technical support, training and compliance testing for PCI-X. IBM, Intel, Microelectronics and Mylex were to develop supporting chipsets. 3Com and Adaptec were to develop compatible peripherals. To accelerate PCI-X adoption by the industry, Compaq offered PCI-X development tools at their web site. All major chip makers generally now have or have had some variant of PCI-X in their product lines.
AGP cards are backward and forward compatible within limits. 1.5 V-only keyed cards will not go into 3.3 V slots and vice versa, though Universal slots exist which accept either type of card. AGP Pro cards will not fit into standard slots, but standard AGP cards will work in a Pro slot. Some cards, like Nvidia's GeForce 6 series or ATI's Radeon X800 series, only have keys for 1.5 V to prevent them from being installed in older mainboards without 1.5 V support. Some of the last modern cards with 3.3 V support were the Nvidia GeForce FX series and the ATI Radeon 9500/9700/9800(R350) (but not 9600/9800(R360)).
It is important to check voltage compatibility as some cards incorrectly have dual notches and some motherboards incorrectly have fully open slots. Furthermore, some poorly designed older 3.3 V cards incorrectly have the 1.5 V key. Inserting a card into a slot that does not support the correct signaling voltage may cause damage.
There are some proprietary exceptions to this rule. Additionally, moving cards between computers of various CPU architectures may not work due to firmware issues.
PCIe, unlike previous PC expansion standards, is structured around point to point serial links, a pair of which make up lanes; rather than a shared parallel bus. These lanes are routed by a hub on the main-board acting as a crossbar switch. This dynamic point-to-point behavior allows more than one pair of devices to communicate with each other at the same time. Older PC interfaces had all devices permanently wired to the same bus; therefore, only one device could send information at a time. This format also allows channel grouping, where multiple lanes are bonded to a single device pair in order to provide higher bandwidth.
The number of lanes is negotiated during power-up or explicitly during operation. By making the lane count flexible a single standard can provide for the needs of high-bandwidth cards while also being economical for less demanding cards.
Unlike preceding PC expansion interface standards, PCIe is a network of point-to-point connections. This removes the need for arbitrating the bus or waiting for the bus to be free and allows for full duplex communications. This means that while standard PCI-X 133 MHz 64 bit and PCIe x4 have roughly the same data transfer rate, PCIe x4 will give better performance if multiple device pairs are communicating simultaneously or if communication within a single device pair is bidirectional.
Specifications of the format are maintained and developed by a group of more than 900 industry-leading companies called the PCI-SIG.
PCI-X revised the conventional PCI standard by doubling the maximum clock speed from 66 MHz to 133 MHz and hence the amount of data exchanged between the computer processor and peripherals. Conventional PCI supports up to 64 bits at 66 MHz though anything above 32 bits at 33 MHz is only seen in high-end systems and additional bus standards move 32 bits at 66 MHz or 64 bits at 33 MHz. The maximum amount of data exchanged between the processor and peripherals with PCI-X is 1.06 GB/s, compared to 532 MB/s with standard PCI. PCI-X also improves the fault tolerance of PCI allowing, for example, faulty cards to be reinitialized or taken offline.
PCI-X is generally backward-compatible with most cards based on the PCI 2.x or later standard, meaning that, a PCI-X card can be installed in a PCI slot, provided it has the correct voltage keying for the slot and nothing obstructs the overhanging part of the edge connector. Originally the PCI bus was a 5-volt bus. Later, in PCI Revision 2.x, the PCI bus was a dual-voltage interconnect. In 3.0 this was changed to 3.3 volts only. The PCI-X bus is not compatible with the older 5-volt cards but newer 3.3-volt PCI cards will work in a PCI-X slot. Apart from this, PCI and PCI-X cards can generally be intermixed on a PCI-X bus, but the speed will be limited to the speed of the slowest card. For example, a PCI 2.3 device running at 32 bits and 66 MHz on a PCI-X 133-MHz bus will limit the total throughput of the bus to 266 MB/s. To get around this limitation and the voltage compatibility issue, many motherboards have separate PCI-X channels that can be dedicated to different PCI hardware families if needed, allowing for better backward compatibility while maintaining higher total system bandwidth.
33.33 MHz clock with synchronous transfers
peak transfer rate of 133 MB/s 133 million bytes per second for 32-bit bus width 33.33 MHz × 32 bits / 8 bits/byte = 133 MB/s
peak transfer rate of 266 MB/s for 64-bit bus width
32-bit or 64-bit bus width
32-bit address space 4 gigabytes
32-bit I/O port space
256-byte configuration space
5-volt signaling
reflected-wave switching
The PCI bus arbiter performs bus arbitration among multiple masters on the PCI bus. Any number of bus masters can reside on the PCI bus, as well as requests for the bus. One pair of request and grant signals is dedicated to each bus master.
PCI 2.2 allows for 66 MHz signalling at 3.3 volt signal voltage peak transfer rate of 533MB/s, but at 33 MHz both 5 volt and 3.3 volt signal voltages are still allowed. Power rails to provide 3.3 volt supply voltage are now mandatory.
PCI 2.3 permits use of 3.3 volt and universal keying, but does not allow 5 volt keyed add in cards.
PCI 3.0 is the final official standard of the bus, completely removing 5-volt capability.
Mini PCI is a form factor of PCI 2.2 for use mainly inside laptops
CardBus is a PC card form factor for 32-bit, 33 MHz PCI
CompactPCI uses Eurocard-sized modules plugged into a PCI backplane.
PC/104-Plus is an industrial bus that uses the PCI signal lines with different connectors.