what is the difference between Soft and hard IP

Hi
I have subject called Networking in which I am studying on IP (DSP), and I want to know what is the difference between a microprocessor and a hard soft microprocessor.

I have knowledge on the microchip embedded SOC (System On Chip).
There are processors which is of 2types which embarks on FPGA: microprocessor soft and hard microprocessor.
I want to know the difference between these 2 types.

A second question: these embedded microprocessors are implemented by an IP (Intellectual Property) on the SOC.
I want to know is that these IPs can implant a microchip or hard they may implan soft microprocessor on SOC?

Thank you.

All Digital IP starts as soft IP

• RTL model is reference implementation model
• specification can be written and/ or executable (C++ or behavioral HDL)
• synthesizable RTL used to generate all hard views
• Full custom block can be used to replace blocks in critical path

GDSII (Hard version) is just another view

• Provided to expedite other designs on some process
• porting is done via re-synthesis
• full custom sections ported by porting tools or manually

I will provide an PDF file suggestion which named as "Beginners' Guide to Soft and Hard IP Cores"which is for software or hardware professionals, as an introduction to using and licensing intellectual property (IP) "cores" from commercial IP vendors for use in a custom or customized chip, ASIC, system-on-chip (SoC), ASSP, or FPGA.
It is available on Internet for download please search for that.It is very useful guide.

Hi,

As long as you use the Block Plus core for the Hard IP implementation, the interface is very similar, save a few signals to the PCIe soft cores.

Since the Block Plus core implements the Hard Block you will have an area savings advantage over using the soft cores.

A x4 design, the Block Plus core uses a 64-bit user data path and can operate at either 125 or 250 Mhz.

If you use the soft core for a x4 design, it is a 32-bit data path running at 250 Mhz.

If you are doing x8, then both use a 64-bit data path at 250 Mhz.

Other differences center around how the soft core and hard core manages incoming completion packets resulting from Memory Read request sent by the user application.