How does overvolting work with overclocking?

[Ebenezer]

hi,

I had asked about overclocking and overvolting some days back....Thank you all for your great replies. I wanted to ask overclocking being more frequently used (with processor, RAM, sometimes graphic card, etc) how ovevolting works with overclocking ?

thank you....

[Hockson]

To begin, it is best to explain exactly what overvoltage accomplishes, and how voltage works in the first place.
Overvolting does not increase overclocking potential by giving our hardware "more juice" or "more fuel". It increases overclocking potential by altering signal strength.

Our computers use a language of 1s and 0s – the binary language of computer processes. Physically speaking, these 1s and 0s occur through voltage highs and voltage lows, two signals representing a 0 (voltage low), and a 1 (voltage high). 0V typically represents voltage low, referred to as VSS. Voltage high is typically referred to as VCC, VDD, or VCORE, and is a variable voltage, dependant on the specific piece of hardware in question, and the transistor type used within that hardware (For example, a 90nm Athlon64 3200+ has a stock VCORE of 1.5V. A 90nm intel 540J 3200 MHz Pentium 4 has a stock VCORE of 1.4V).

So, 0V (voltage low, or VSS) is treated as a 0. A voltage close to Voltage high (VCC/VDD/VCORE), is treated as a 1. Our transistor-based hardware is essentially a massive grid of constantly switching voltages, representing logic 1s and logic 0s – the binary language in a nutshell.

The point of importance to us as overclockers here, is the "If our processor sees a voltage close to Voltage high (VCC/VDD/VCORE), it treats it as a 1." bit. Because of various resistances, our hardware’s transistors must have a tolerance for voltage high – the exact value of VCORE/VDD/VCC is rarely seen.
Overclocking our hardware can throw our voltage signals out of tolerance, and cause problems when a 1 (VCORE, voltage high) is mistaken for a 0 (VSS, voltage low).

[Hockson]

The best way to explain how this happens when we overclock, through use of imagery, is through the use of a runner. This runner is running back and forth on a 100 foot track. It can either be at one end of the track (Voltage high - VCORE), or at the other end of the track (Voltage low - VSS). But, our runner cannot immediately switch from one end of the track to the other (and likewise, our VSS cannot switch to VCORE instantly).
There is a transitional period where our runner is partway between the different ends of the track. The runner is rapidly running from one end of the track to the other (this is the same as our signal switching from VSS to VCORE), and although he is quite quick, there is still a delay between each end of the track (there is also a delay when our voltage signal switches from VSS to VCORE).

The rate at which he is expected to get from one end of the track to the other in ten minutes is our frequency, similar to the frequency at which our hardware operates. At a "stock", un-overclocked frequency, the runner is easily capable of making it to either end of the track in time. The frequency of ‘on’/’off’ signals – voltage high and voltage low signals - representing 1s and 0s, is how fast our hardware can ‘think’ and process. When we overclock, we increase the frequency at which the runner needs to make it from one end of the track to the other (we increase the frequency at which our signal needs to switch from VSS to VCORE), and we shorten the amount of transitionary time allowed for the runner to make it to the other end of the track (when we overclock the frequency, we shorten the amount of transition time allowed for VSS to switch to VCORE).

[Omari]

You can increase the frequency (overclocking), and you may get to the point where it is impossible for the runner to completely make it to each end of the track in the amount of transition time that it is given.

The runner is simply not given enough time to make transit from one end of the track to the other, given the extreme frequency rate expected of him. Now the transistor tolerance comes in. The runner only really needs to make it to the 95 foot mark on the track in order for its run to be registered as a 1 (A 5% tolerance).

Increasing the frequency slightly (and as such shortening the transition time the runner is given), the runner is still able to make it to the 95 foot mark, before it has to head back towards the other end of the track in order to meet his frequency schedule. But when you increase the frequency too much, the runner cannot even make it to the 95 foot mark before it has to turn back towards the other end of the track to meet his frequency schedule (VSS cannot switch to VCORE completely within the transitionary time allowed). Our runner only makes it to, say, the 90 foot mark, and is no longer within the tolerance – its run is counted as a 0 instead of as the 1 it is supposed to be. This represents an overclocked an unstable processor.

[JAMES_911]

In the transistor based hardware, it takes time for the VSS voltage low (0V) to switch to our VCORE voltage high. When you overclock the frequency, you shorten the length of time available for that transition to take place.

When there is inadequate time for VSS to change to VCORE, the signal (the signal itself being voltage) doesn’t make it all the way to VCORE – at a certain point our transistor’s voltage high signal tolerance is exceeded, and the VCORE signal is not strong enough to be registered as a 1 anymore. Instability occurs as a result – the 1s are being mistaken for 0s, and the computer cannot make sense of it.

[JAMES_911]

Overvolting can alleviate this problem. The issue lies in the amount of time that it takes for the signal to change from VSS to VCORE – the signal can’t switch quickly enough to reach a strength recognizeable as a voltage high (VCORE) by our transistors. When you increase the voltage to high value (overvolting), you force the signal/voltage to reach a higher voltage high, but in the same amount of time as before.

You stretch out the ‘range of motion’ (the difference between VSS and VCORE), but we leave the transition time alone. The result is that it takes considerably less time for the signal to switch from VSS to a VCORE that is within transistor tolerance – this accommodates the faster switching frequency, and keeps the overclocked signal switching frequency strong (stable) and within transistor tolerance.