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Thread: Industry standard architecture

  1. #1
    Join Date
    Aug 2009
    Posts
    14

    Industry standard architecture

    Hello , I would like to know what is Isa , industry standard architecture , and what is the latest Version of Isa , when isa was Used and how does Isa works , please help me thanks in advance for your help

  2. #2
    Join Date
    May 2008
    Posts
    698

    Re: Industry standard architecture

    The Industry Standard Architecture, commonly abbreviated as ISA is a standard computer bus used internally for connecting expansion cards to the motherboard of a computer. It is a 16 bits width bus with a clock speed of 8 MHz. It allows bus mastering on the first 16 megabytes. The ISA bus was developed by IBM as part of the creation of the PC in 1981. Originally a width of 8 bits, it goes to 16 bits in 1984, first under the name AT bus.

    The Extended Industry Standard Architecture, or EISA bus is a standard for improving ISA bus offered by Compaq at the head of a consortium of manufacturers, in response to the IBM Isa bus

  3. #3
    Join Date
    May 2008
    Posts
    1,205

    Re: Industry standard architecture

    The ISA bus allow bus mastering , it means that it allowes to communicate directly with other devices without going through the processor. The Industry Standard Architecture, commonly abbreviated as ISA 'is a standard computer bus used internally for connecting expansion cards to the motherboard of a computer. It has been over a decade bus standard compatible PC. Since 1998 it has almost disappeared from the new motherboards for the benefit of the Peripheral Component Interconnect (PCI)

  4. #4
    Join Date
    Nov 2005
    Posts
    1,187

    Re: Industry standard architecture

    The original ISA bus (Industry Standard Architecture), appeared in 1981 with the PC XT, was a bus width of 8 bits clocked at a frequency of 4.77 MHz.

    In 1984, with the advent of the PC AT (Intel 286), the bus width is increased to 16 bits and the frequency successively from 6 to 8 MHz, and finally 8.33 MHz , providing a theoretical maximum throughput of 16 Mb/s (in practice only 8 MB / s in that cycle two was used for addressing).

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