DDR3 Memory Timing After Overclocking

[vishodhan]

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Hello,
I have a motherboard MSI X48 Platinum, a Intel Q9450 and I have the Corsair DDR3 XMS3 DHX Series TWIN3X2048-1600C7DHX PC3-12800 2GB Kit 7-7-7-20 240pin DIMM.So it is being advertised 7-7-7-20 at 1600MHz with 1.8V. I overcloacked PC last week,the trial of 2.66GHz, I climbed to 3.2ghz, 400mhz bus speed, 1600MHz FSB, ratio 1 2, ram to 1.83V (I have not 1.8v) .

No cares for all this, but now the Ram : Dram frequency 800mhz ,FSB: DRAM 1:2 (manual setting) 9-9-9-24 1T.In the bios should I adjust the ratio to 1:1? for the ram to 1600 Mhz?

[.:MUNDITO:.]

hi,
Dram frequency = 800 MHz in real commercial value or value ddr, this is 1600 mhz, so it is well settled, the 1:2 mean real FSB 400 and DDR 800 ram real or FSB 1600MHz and 1600 MHz DDR value commercial. So you just have a lower timings, because even if the 1T is very good, work better to have low and 1T timing as high timings and 1T. For timings are important only the first 4, the TRFC and the CMD.

The ideal is to have good timing primary (the first 4),with a TRFC its lowest latency plays thus responsiveness of the system,and in CMD 1T.

[SUpER CoP]

hi,
CAS Latency (CL) RAS to CAS Delay (tRCD) - RAS Loading (TRP) and RAS Active Time (tRAS) are in order, the Command rate (CN) and Finally Row Refresh Cycle Time (tRFC) are the most accessible and play a lot already on the performance / stability.

[vishodhan]

Thanks for the information but I have to learn when I go in to the Ram Manuel,I manually put values "by default" ... what do I need? when I go into the settings Ram Manuel, I have put all the settings: CAS Latency (CL) RAS to CAS Delay (tRCD) - RAS Loading (TRP) and RAS Active Time (tRAS) are in order, the Command rate (CN) and the Row Refresh Cycle Time (tRFC).

[Omari]

otherwise, you lose 1 refresh cycle so if the strips are stable at the frequency and timings obtained from 7-7-7-20 1T, leaving them to 1T command rate, for you can play against the tRFC,you will see the value set by the bios,if you can lower this value so as to make even more swift barettes (instabilities attention, even from the bios).