"In the coming weeks, Intel will advance some preliminary information on the next generation of Xeon CPU based on Nehalem architecture and equipped with 8-core"
During the first quarter 2009 Intel put on the market for the first cpu server systems and workstations of the Xeon family, based on the architecture known as the code name of Nehalem.
These cpu implement for the first time, within the family of Xeon cpu, memory controller is integrated bus communication QPI, QuickPath Interconnect, through which significantly improves the performance in speed multisocket environment.
In conjunction of the International Solid State Circuits Conference, an event that will take place between 8 and 12 February in San Francisco, Intel will give a public presentation based on its Xeon cpu with 8 physical cores and 16 logical cores.
These processors will integrate well with its internal 2.3 billion transistors, thanks to the use of technology to 45 nanometers. The cpu, currently indicated by the code name of Beckton, the internal integrated 4 connections QPI-type point to point and use LGA-1567 socket for connection to the motherboard, hence requiring the use of new platforms over As adopted by the previous Xeon cpu based on Core 2 architecture.
Considering the amount of transistors reported by Intel for these processors, taking as reference the 731 million transistors integrated into cpu Core i7 quad core Nehalem-based architecture, it is reasonable to assume that these processors will use a unified L3 cache between the cores well above 8 Mbytes is currently in per cpu Core i7 desktop systems.
The cache, however, is a component that affects a significant effect on the total number of transistors integrated into a processor with a proportioning impact far more content in terms of total area of the processor. It is unclear at the present time when Intel will present the 8-core processors, with native architecture and not a Multi-Module: It is assumed that during the event at the International Solid State Circuits Conference will be provided further details.
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