PCI-E 3.0 vs PCI-E 2.0

[Uganda]

I don’t know that whether this is right or not but I have heard that there is 30% transcoding difference between PCI-E 3.0 and PCI-E 2.0. I just wanted to confirm this and wanted to have some more information about the difference between these. So I am posting this over here. If you can provide me some information about the difference between PCI-E 3.0 and PCI-E 2.0 then I will be thankful for all the replies for this. I was searching for this on google but failed to get some satisfactory result for this. So I am starting a new thread here to get some reply from the people over here. I hope that I will get some quick post on this. Thank you so much in advance for reading and replying to this.

[Dabert]

In practical terms, PCI Express 3.0 delivers double the bandwidth as compared to PCI Express 2.0, or 16 GB / s per direction for a theoretical device in x16 mode instead of 8. However, you will notice that 8 GT / s is little higher as compared to 10 GT / s but from. This is explained by the fact that early versions of the PCI Express encode their data in 10 bits and not only 8 bits of information (4.0 GT / s theoretical numbers). PCI Express 3.0 changes this to a more complex encoding of 130 bits to 128 numbers that maximizes the effectiveness of a link 8 GT / s.

For now, only the LGA 2011 platform is based on the LGA 2011 chipset and processors Sandy Bridge-E can have the PCI-Express 3.0. The Ivy Bridge LGA 1155 also support this standard. Backwards compatibility requires, PCI-Express 3.0 course work in 2.0 and 1.0 ports, and vice versa.

[Gameli]

With PCI-E 3.0, there is the bit rate increase of 5 GTps and with pci-e 2.x to 8GTps. The available bandwidth per PCI-e link in one direction is doubled to around 1Gbps, while for example a video card in a PCI-Express 16x slot up to 32GBps available.The doubling of the available bandwidth of PCI-E 3.0 is not only the result of the increase in the number of data transactions. The new 128/130bit-encodering, leading to a reduction in the overhead leads and the new Dynamic Feedback Equalization technology which improves the SNR, are co-responsible for this. Except for the new cards, it will also be used to interconnect 4PORT-10Gbps Ethernet chips and the new 40Gbps Ethernet chips that now in good use. For example, there are several companies at the IDF 2010 products which are based on PCI-e 3.0 is already announced. For SSDs, the use of PCI-e 3.0 is interesting. It will also address the future Sandy Bridge server CPU's native support for PCI-E 3.0. The motherboard via a firmware update can be upgraded to the ultimate 3.0-pci-e specification. The pci-e 3.0 specification was announced in 2007 and would have been previously released but the process was delayed.

[Dannai7]

The PCI Express is important for performance because of the CPU multi-core? For example, only applications optimized properly can use two processors, four and six cores, but each may have in some way the components connected via PCI Express. Newer is better all the times and so PCI 3.0 is better than PCI 2.0. In most of the aspects, they are almost the same but for if we see that overall then that is really very good in terms of the performance. So it depends on you that whether you are happy with the PCI 2.0 performance or you want something more than that. To have better experience with the performance, it is recommended that you must go for the PCI 3.0.

[JErastus]

Each new revision of the PCI-E BUS has brought with it a doubling of the bandwidth compared to the previous version and the end user could easily enjoy an improvement in performance, though not with high-speed peripherals such as RAID controllers evolved. In the past we have analyzed the difference between the performance of a video card connected to the system with a PCI-E 2.0 x8 and PCI-E 2.0 x16, without being able to get a clear improvement in performance and so it is obvious that the question comes as “what can we expect from a PCI-E 3.0 x16 slot?”

First of all, it is necessary that the whole chain of devices adopt the new interface, the controller is integrated into the CPU and a possible bridge PCI-E video card is used. Make sure that the motherboards that use PCI-E 3.0 bridge connected to a CPU that only supports PCI-E 2.0, the second will in any case your main bottleneck. Enabling PCI-E 3.0 is optional and the MSI Big Bang XPower-II can be activated in the BIOS screen in Settings - Advanced - PCI Subsystem Settings - PCIE GEN3. We performed the test by setting the CPU frequency Intel Core i7-3960X at 4200MHz and memory at 2400MHz with the intent to reduce the variation in performance introduced by the 2.0 Turbo Boost technology. This otherwise would have influenced the frequency of the CPU less predictable.

In the three games and two synthetic benchmarks tested, the variation in performance varies between + 0.1% of Futuremark 3DMark 11 and + 2.8%. These results highlight how the BUS PCI-E 3.0 does not bring any benefit in terms of performance compared to the traditional 2.0, so small variations in performance are in fact negligible. The PCI-E 3.0 will certainly be important in applications that require wide bandwidth between the CPU and peripherals that is used, video cards or storage devices, consumer applications. In short we should not expect a revolution in this respect.

[Kirt]

With PCI Express 2.0 doubled the clock frequency to 5 GHz, which also doubled the available throughput: 500 MB / s PCI Express 2.0 x1 and 8 GB / s PCI Express 2.0 x16. With PCI Express 3.0 increases the clock frequency of 5 GHz to 8 GHz, so no factor of two, yet promises to double the speed. That has everything to do with the encoding.

PCI Express is a serial protocol, which means that all lanes separately send data and not having to be synchronized with each other or with an external clock signal. The recipient must be from the data at which the data are sent to extract, so that sender and receiver can work synchronously. As is known, all data within the PC 1s and 0s - in practice: yes or no tension - and if these two together in a continuous stream of data but often enough turns, the receiver in no time the right 'rhythm' address. When the flow of communication, however accidental or many 0-and either lot 1-and back together, and there is either a very long time no or very long or voltage, the synchronization loss and the receiver can not entirely sure know exactly how many 0s or 1s are received. To overcome that problem is in PCI Express 1.0 and 2.0 called 8b/10b encoding used, as with the USB standard way.

[SANDESH49]

PCI Express 3.0 abandoning encoding and applies a 128b/130b of encryption. Or: for each 128-bits a 130-bit data is sent. Thus, there is virtually no overhead. In this way, there are more and 0 and 1 and one after the other, but there is another -, moreover, not yet published - solution devised. The clock frequency of 8 GHz PCI Express 3.0 thus resulting in just under 1 GB / s, 984 Mb / s to be exact. We can say that this is double compared to the 500 MB / s PCI Express 2.0. A x16 slot of the 3.0 generation can therefore just under 16 GB / s transport. The coding is for every 8 bits to 10 bits eventually used. The data is translated in a way that a maximum of 3 zeros or ones behind could be reconciled. In a final data stream is the total number of zeros eventually almost as large as the number of ones.